HDI UHDI Yields…It’s Not Only the Etcher
by Don Ball, Process Engineer
If your HDI or UHDI production process is quality challenged, don’t assume your etcher is to blame. Many factors impact the quality of the final product, so assess broadly, and you may find that the “the devil is in the details”.
Generally, the first place most people can get good product specification measurement is at the end of the etching process so it’s natural and easy to blame quality shortcomings on the etcher. By all means, look at your etcher and invest some time trying to improve its performance but don’t stop there. Other factors may be affecting the etch uniformity.
Each process step prior to etching adds variation to the final product. In most cases the added variation is small but, as the features on the etched panel get smaller and closer together, they become more important.
For example, back in the days when 0.004” (100µm) lines and spaces were state-of-the-art (yes, I have been around that long) a circuit board manufacturer that had been mostly producing consumer boards requiring lines and spaces of around 0.008” or more took on a job requiring the then state of the art 0.004” lines and spaces. Their yields went from 95+% on their 0.008” line and space product to less than 50% for the 0.004” space product and they lost money on that job. A lot of time and effort was spent on etcher optimization, which improved yields significantly but not to the point of profitability.
In this instance it was found that a change in procedures in the resist exposure step solved their problem. For most of their production panels the exposure was made as soon as the vacuum gages indicated full vacuum. For the 0.004” space panels it was found that delaying the panel exposure for 30 seconds after full vacuum was drawn brought their yields back to the 95% range. The extra time allowed the photo-tool to come into closer contact with the resist and prevented leakage from their non-collimated light source from causing shorts across the narrower spaces. Ultimately, they upgraded their exposure units to ones with collimated light sources and better and more consistent vacuum drawdowns to meet the specifications of the then high-tech products.
By today’s standards this is a relatively crude example, but it does show that some attention to other process steps as well as etching can solve some problems involved with high density circuit production.
A more recent example is provided by two companies I assisted about two years ago. Both companies were making high density, flex circuits using a reel-to-reel process. Company B was consistently outcompeting Company A for business and Company A could not understand why. Both companies were long time customers and familiar with each other, so Company A was aware that Company B had a newer model etcher. They assumed that this was the problem, asked for an audit of their etcher and for information on the latest advances in etcher technology.
Company A’s etcher had been purchased in the mid-90’s but had been well maintained and optimized for their production. When I ran and analyzed my test panels, I saw that their etcher performance was on par with the etcher in my lab, which was the same model and vintage as Company B’s (circa 2015 or so). I informed the management that I didn’t think a new etcher was going to improve their competitive outlook. This advice was not well received. If not the etcher what else could it be?
The difference was that when Company B decided to get into HDI production (UHDI was still in the future at that point) they took the time to study each process step in the production line from incoming materials to out-going packaging and look at how to optimize each step. In the etching process they looked in detail at surface prep, types of resists, resist application, photo-tools, resist exposure, developing and etching. By “in detail” I mean they analyzed such things as roller temperature for dry film lamination, exposure times and intensities, developer concentrations, etc. to find the most efficient and cost-effective ways to accomplish their goals for high density interconnects. The research took two or three years to complete but in the end, they were positioned to succeed in a highly competitive market. Some equipment upgrades were required but, for the most part, all that was needed was to tighten operating procedures and find the best operating parameters for each process.
The moral of the story: As circuit features shrink and are squeezed into smaller and smaller spaces one should focus on optimizing every step in the etching process and not just one small area where you assume the problems exist.
